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12. Intel 6~7 series chipset architecture
Today we will learn about the Intel 6~7 series chipset architecture.
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Hello everyone, today we will learn about the Intel 6~7 series chipset architecture

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This is a notebook motherboard Intel 6~7 series chipset architecture diagram

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In this architecture diagram, the PCH of HM75, HM76...7 series is used here

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With IVY Intel 3rd generation processor

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CPU manages discrete graphics via PCIE x16 bus

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This graphics card uses a NIVIDIA graphics card

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"VRAM" refers to video memory

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The CPU also manages DDR3 memory via the memory bus

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This is the memory slot

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Dual channel

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Two memory slots support a total of 8GB of memory

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There are two sets of communication buses between CPU and PCH

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First is FDI bus

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It's a one-way transfer

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Used to transmit display signals

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The display signal is sent to the PCH by the CPU through the FDI bus

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Then sent to each display interface by PCH

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Such as LVDS interface, CRT interface and HDMI interface

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Integrated graphics card inside the CPU

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It also manages the discrete graphics (discrete graphics card)

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Whether it is the display signal of the discrete graphics card or the display signal of the integrated display card inside the CPU

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Both are sent to the PCH chip through the FDI bus

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Then sent to each display interface by the PCH

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The second set of buses between the CPU and PCH is called the DMI bus

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This is a two-way transmission

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used to transmit all data except display signals

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It can send data to CPU by PCH

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Data can also be sent by CPU to PCH

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It's called two-way transmission

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Start with the 7-series chipset

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PCH supports USB 3.0 bus

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So here are two USB 3.0 ports

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Next is the PCIE x1 bus

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The PCIE x1 bus is connected to the wired network card

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Also connected to the mini PCIE slot

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It's for the wireless network card

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The PCH is also connected with a SPI ROM

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Transmission via SPI bus

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PCH also communicates with EC via LPC bus

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EC manages the touchpad and also the keyboard

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It also monitors other circuits

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Such as temperature control circuits

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and charging circuit

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It was also involved in the boot

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Next is SATA bus

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It is mainly used for communication between PCH and hard disk, CD-ROM

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For managing hard drives and CD-ROM

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Responsible for communicating with the hard disk drive

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USB 2.0 bus

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It mainly connects external devices

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Next is the last one

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PCH manages the sound card chip through the sound card bus

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Responsible for communicating with the sound card

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Ok, this is the 6~7 series chipset architecture diagram

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