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14. Intel 4~5 generation single CPU architecture
Today let's learn about Intle's 4th and 5th generation low-power CPU architecture.
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Hello,everyone

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Today let's learn about Intle's 4th and 5th generation low-power CPU architecture

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This is the Intle 4th and 5th generation low-power CPU architecture diagram of the notebook motherboard

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The middle part is called CPU, the real thing is as shown on the right

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The eDP (Embedded DisplayPort) here refers to the display signal output by the CPU and sent to the screen

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This DP (DisplayPort) refers to the DP display signal output by the CPU

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For DP interface and CRT (Cathode Ray Tube) interface

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The middle refers to the conversion chip

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For example, convert DP signal to analog display signal

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This is the LPC bus (Low pin count Bus)

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For communication between CPU and EC

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EC manages keyboard, touchpad

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EC is also connected to SPI Flash (EC's program)

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CPU also manages the card reader through the PCIE bus

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Also connected to the MINI PCIE slot

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which is the wireless card slot

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It also manages wired network cards

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This "RJ45" refers to the network cable interface

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This is the network card chip

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CPU manages the accelerometer and temperature control circuit through the SMBUS (system management bus)

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And NFC (Near Field Communication) communication

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The SATA bus of CPU is connected to the hard disk

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and mSATA modules

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USB 3.0 device connected to the CPU's USB 3.0 bus

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The CPU's USB 2.0 bus is connected to many USB 2.0 devices

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For example, the USB 2.0 interface

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Bluetooth

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fingerprint

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camera and so on

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Also goes to the wireless card slot

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The sound card bus of CPU manages the sound card chip

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CPU also manages memory through the memory bus

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The memory used here are DDR3, DDR3L

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These are the architecture of the 4th and 5th generation low-power CPUs

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