1

00:00:00,466 --> 00:00:03,866

Hello everyone, today we are going to learn about clock signals

2

00:00:04,833 --> 00:00:06,900

The clock signal is called clock

3

00:00:07,300 --> 00:00:11,000

It is an indispensable condition in the work of digital circuits

4

00:00:12,066 --> 00:00:15,600

It is to provide a benchmark for the work of digital circuits,

5

00:00:15,800 --> 00:00:19,233

so that all connected devices work in a unified pace

6

00:00:20,566 --> 00:00:22,866

The basic unit of a clock is Hertz

7

00:00:24,666 --> 00:00:29,200

The clock circuit sends out different clock frequencies for different devices

8

00:00:29,866 --> 00:00:36,566

However, two connected devices must have the same clock frequency and voltage to communicate properly

9

00:00:37,666 --> 00:00:40,233

Common clock frequencies are as follows:

10

00:00:44,266 --> 00:00:48,633

Intel CPUs 6 generations or older have three sets of clocks

11

00:00:49,133 --> 00:00:56,666

For example, this CPU, it has a PCI_BCLKP/N, which is 100MHz

12

00:00:58,000 --> 00:01:03,166

There is also a BCLKP/N, and this bus clock is 100MHz

13

00:01:04,233 --> 00:01:09,566

There is also a CLK24P/N, which is 24MHz

14

00:01:10,700 --> 00:01:15,566

These are the three sets of clocks that CPUs will need after 6 generations

15

00:01:16,700 --> 00:01:19,800

PCH usually has two crystal oscillators

16

00:01:20,933 --> 00:01:30,866

One is 32.768KHz RTC oscillator, and the other one is 25MHz or 24MHz crystal oscillator

17

00:01:40,133 --> 00:01:42,900

PCIE bus has clock of 100MHz

18

00:01:45,566 --> 00:01:53,600

For example, PCH sends signals to the network card, mini PCIE slot, and independent graphics card......

19

00:01:53,900 --> 00:01:56,966

They all use a 100MHz PCIE bus clock

20

00:02:01,300 --> 00:02:05,633

The LPC bus clock is 33MHz or 24MHz

21

00:02:14,100 --> 00:02:20,666

For CPUs over 11 generations, the clock crystal is changed to 38.4MHz

22

00:02:26,966 --> 00:02:31,400

The clock crystal of an independent graphics card is 27MHz

23

00:02:33,700 --> 00:02:40,866

It is managed by the CPU through the PCIE bus, and a 100MHz PCIE bus clock is also required

24

00:02:43,833 --> 00:02:48,066

T2 chip or M1 processor clock crystal is 24MHz

25

00:02:49,366 --> 00:02:52,733

Apple's EC crystal frequency is 12MHz

26

00:02:53,833 --> 00:02:58,466

There is also an eSPI bus, and the eSPI bus clock is not fixed,

27

00:02:58,766 --> 00:03:00,733

so it is not described here

28

00:03:01,900 --> 00:03:09,833

Because the eSPI bus clock can be programmatically customized, usually between 20MHz and 60MHz

29

00:03:14,500 --> 00:03:19,633

In general, clock frequencies above 100MHz are differential clocks

30

00:03:23,566 --> 00:03:28,100

All other 100MHz clocks are basically differentially transmitted,

31

00:03:31,533 --> 00:03:35,533

which means that it takes two wires to transmit a set of clock signals,

32

00:03:36,333 --> 00:03:38,266

which we call a pair of clocks

33

00:03:42,300 --> 00:03:47,700

This differential clock, when measured through an oscilloscope, has this shape

34

00:03:53,500 --> 00:03:56,466

When the top one is high, the bottom one is low

35

00:03:58,800 --> 00:04:05,566

When the peak below becomes high, the peak above is low, which is called differential transmission

36

00:04:07,266 --> 00:04:11,466

Each of these lines can bemeasured a clock frequency of 100MHz

37

00:04:12,333 --> 00:04:16,333

LPC bus clock is 33MHz or 24MHz,

38

00:04:16,900 --> 00:04:20,366

this is a wire transmission, do not need two wires

39

00:04:21,100 --> 00:04:24,233

All clock signals need to be measured by oscilloscope

40

00:04:26,266 --> 00:04:30,100

The measured clock frequency is consistent with the marked frequency,

41

00:04:30,300 --> 00:04:32,166

indicating that it is normal

42

00:04:33,166 --> 00:04:35,966

Okay, this is the introduction of the clock signals