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Hello everyone, today we are going to learn about the LPC bus of the SMC

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LPC is the Low Pin Count bus

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It is the communication bus between SMC and PCH, or between SMC and CPU

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SMC is also known as EC

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The LPC bus connects the EC to the PCH

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All data is transmitted between the EC and PCH through the LPC bus

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Its working conditions have these

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The first is VDD,

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which refers to the power supply of the EC's LPC bus module

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The second is LPC_CLK24M_SMC, which is its 24MHz clock frequency,

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also known as the LPC bus clock

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The LPC bus clock, as we can see here, is internally named LPC0CLK

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and externally named LPC_CLK24M_SMC

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The LPC module from the PCH or CPU provides the working conditions for the EC

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The third is its reset signal SMC_LRESET_L

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The reset signal is 3.3V and is usually provided by a platform reset in the mainboard

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The reset signal in the mainboard is this pin, LPC0RESET,

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usually from the platform reset

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Next is the address data compound line,

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respectively are LPC_AD0, LPC_AD1, LPC_AD2, LPC_AD3,

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from 0 to 3, these four lines

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This is bidirectional; all data between EC and PCH is transmitted over these 4 lines

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This is the one that transmits the data address information, and we call it the address data compound line

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LPC_FRAME_L is the frame period of the LPC bus

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When this signal is valid, it indicates to start or end a data transfer on the LPC bus

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This frame period signal is also active at low level

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Any signal with an "_L" end indicates a low active level

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Then the LPC bus has these conditions,

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there are power supply, clock, reset,

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frame and address data compound line

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During maintenance, we can measure the data waveform

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between EC and bridge by oscilloscope on LPC bus

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At the same time, we can also connect the diagnosis card on the LPC bus to observe the mainboard self-test process

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Well, that's the introduction to the EC's LPC bus