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122. Boot timing sequence
In the video, we are going to learn about the boot timing sequence.
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Hello everyone, today we are going to learn about the boot timing sequence

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This lesson includes two aspects,

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one is the explanation of the boot timing signal,

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the other is the introduction of boot process

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First, let's look at the boot timing signal explanation

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When the previous standby conditions are normal,

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after receiving this PWRBTN# trigger signal,

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the PCH of the 100 series chipset will pull up the following signals to high level, SLP_S5#, SLP_S4#, SLP_S3#, etc.

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SLP_S5# indicates to exit the shutdown state

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SLP_S4# is used to enable power supply for S3 state, such as memory power supply

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SLP_S3# will be used to enable the power supply required by the S0 state,

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such as bus power supply, CPU power supply, etc

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In the 100 series chipset, this SLP_A# is no longer used because the ME module is powered off

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Once this SLP_A# was used to turn on the power supply of the ME module

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Now there is no need for it to exist,

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since the ME module power supply has been removed from the 100 series chipset

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SLP_LAN# and SLP_WLAN# are used to enable the power supply of the network adapter

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This signal is used only when some Intel original NICs are used

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In most models, these two signals are not used

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SLP_S0#, this signal is not present in the standard timing diagram,

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but it is present in the actual circuit

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This signal is used to control the CPU power supply into light load mode when the PCH and CPU are idle

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This signal can also be connected to the EC for other power management purposes

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Now let's look at the boot process

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For a computer to be turned on, the EC and PCH must be involved

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In the first step, the EC must meet standby power supply, standby clock, and standby reset requirements

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The EC program is read, the pin is configured, and the adapter is detected

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The LID# signal is high level, and the switching signal is also high level

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If these conditions are satisfied,

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we press the switch, it will generate a high- low- high level jump

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That is, when we press the switch, the signal will be pulled down,

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and when we release the switch it will return to the high level

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After receiving the switching signal,

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the EC will delay sending out a high- low- high pulse to the PCH pin

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When all the 10 standby conditions of PCH are normal, these include the top 4 standby conditions of RTC,

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as well as the deep sleep standby condition and the light sleep standby condition

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The PCH sends out the SLP_S*# signal to turn on the power supply of the following power supply

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Ok, this is the boot process

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