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Hello everyone, today let's learn about the timing of each power supply

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This course consists of two parts

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One is the explanation of each power supply signal,

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and the other is the timing of each power supply signal

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In this timing diagram for the 100 series chipset

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After the previous standby conditions are normal, and PCH received the switch signal

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It sends out various SLP_S*# signals to turn on each power supply

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These are the voltages that are involved in the power supply

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The first VDIMM is the power supply for the memory

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These include 1.2V of main supply for the memory VDDQ, and 2.5V of its VPP supply

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There are also some secondary voltages over 1.2V, such as VCCPLL_OC power supply and so on

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This power supply is generally controlled by the SLP_S4# or SLP_S5# signals sent above

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This VCC refers to the secondary voltage 3.3V, secondary voltage 5V, and secondary voltage 1.0V, etc.,

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including bus power supply VCCIO, VCCST, VCCSTG, VCCPLL, etc

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These supplies are usually controlled by SLP_S3# signals from the front

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When these power supplies are normal,

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a signal VCCST_PWRGD is generated and sent to the CPU to inform the CPU that the vccst power supply is normal

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This PG signal is usually 1V

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The CPU will delay sending a DDR_VTT_CNTL signal to control the power supply of the memory bus to 0.6V,

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which is half of the main power supply of the memory

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It also controls the generation of VCCSA and VCCCORE_CPU

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These are all power supplies to the CPU

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Where VCCSA is the system butler power supply to the CPU, 1.0V or 1.05V

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VCCCORE_CPU Indicates the power supply to the CPU core, which is about 1V

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These are usually controlled after the bus is powered properly

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This VBOOT voltage refers to the boot voltage, which is often referred to as the boot supply

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It means that the CPU is not working yet,

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so give it a power supply in advance as a starting voltage

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Well, here's the explanation for the terms of each power supply

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Now let's look at the timing of their generations

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First, after the standby condition is normal, the PCH receives the switch signal

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It will issue signals SLP S5#, SLP S4#, SLP S3#

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The power supply is switched on by the EC or SLP_S*# signals directly

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SLP_S4# or SLP_S5# will be enabled through the EC

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or directly to supply 1.2V of memory power and 2.5V of VPP of memory power

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SLP_S3# will turn on these secondary voltage 3.3V,

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secondary voltage 5V, VCCST/ VCCSTG directly or indirectly through EC

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When the power supply is normal, a VCCST_PWRGD signal will be generated to the CPU

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The CPU will delay sending a DDR_VTT_CNTL signal to enable 0.6V VTT power supply for the memory

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At the same time, when VCCST_PWRGD is normal,

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it will generate a CPU power supply start signal through EC or other circuit conversion

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to turn on the CPU core power supply VBOOT voltage and VCCSA power supply

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Ok, this is the timing generation of each power supply