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Hello everyone, today we are going to learn the timing sequence of PG signal and clock signal generation

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First, after all the previous power supplies are normal

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PCH must receive a good power supply signal, PCH_PWROK, 3.3V

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This signal is generated after the preceding power supply is normal and sent to PCH,

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which indicates that S0 state voltage is normal

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If the signal is abnormal, power failure and power-on failure will occur

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After the power supply is normal, the 24MHz crystal oscillator of the PCH will start to vibrate and work,

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providing the reference frequency to the clock module inside the PCH

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Next, after PCH gets the signal PCH_PWROK, it reads the ME firmware program in the BIOS,

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configures its internal pins, and initializes the clock module

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After the initialization is complete, the system outputs all clocks,

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including the LPC bus clock and PCIE bus clock

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The PCH then sends a PG signal to the CPU, PROCPWRGD

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This is for the CPU, indicating that the power supply to the CPU core is normal

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The PCH receives a delayed signal, SYS_PWROK,

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indicating that the system power supply is normal

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This is a key PG signal used as the next step to generate the reset signal

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Ok, that's the timing of the PG clock signal