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Hello everyone, today we will learn about the memory power supply circuit

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during the startup process of the laptop

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First of all, memory power supply includes memory main power supply, memory VTT power supply,

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chip power supply, and VPP power supply

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Main power supply of memory: DDR3 memory is 1.5V, DDR3L is 1.35V, DDR4 memory is 1.2V

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The VTT power supply of the memory is half of the main power supply of the memory

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SPD chip power supply is 3.3V

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DDR4 memory also has VPP power supply 2.5V

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The main power supply of the memory is generated by the PWM circuit

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The VTT power supply of the memory is usually provided by a linear voltage

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Its generation process is basically like this

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After booting, the PCH sends out SLP_S4#, SLP_S3#

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Among them, SLP_S4# will control the PWM circuit to generate the main power supply of the memory

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Such as DDR4 memory, it will be controlled by SLP_S4#,

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first generate the VPP power supply of the memory,

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and then use the PG powered by VPP to turn on the main power supply of the memory

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The bus power supply of the memory is controlled by the SLP_S3# signal,

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which is provided by the LDO power supply method

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VDDSPD is the secondary voltage 3.3V,

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which belongs to the 3.3V voltage of the S0 state, which is the chip power supply

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Next, let's take a look at the pin definition and workflow of this typical memory power supply chip

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This memory power supply chip is divided in two parts,

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one part is LDO, the other part is PWM

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The PWM part, it needs to control the work of the upper and lower tubes,

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output the PWM voltage through the inductor,

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and the output end is the main power supply of the memory

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Output through LDO, this is the VTT power supply of the memory, also called bus power supply

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Before this chip can work, it must first meet several working conditions

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The first is the VDD power supply, which is usually provided by the 5V standby voltage

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The CS pin is a limit current setting pin,

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also called an over-current protection setting,

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and its over-current protection threshold is set through a resistor grounded

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PGOOD is the power good signal,

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TON is the frequency setting

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Here, the power supply is pulled up directly through the resistor

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Next, the S5 pin is PWM enable, also called VDDQEN, usually controlled by SLP_S4#

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BOOT is the boost pin

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UGATE is the upper tube drive

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PHASE is the phase pin

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LGATE is the lower tube drive, PGND is the ground

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VDDQ is equivalent to the VO pin, which is the output voltage detection

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It is connected to the back end of the inductor to detect

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whether there is overvoltage or undervoltage at the output terminal

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At the same time, it is necessary to divide the voltage to the FB pin through a resistor in series

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This is the feedback adjustment pin, also known as the output voltage setting pin

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VOUT Setting is output voltage setting

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Its calculation formula is: Vout= Vref*(1+R1/R2)

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R1 is 15.8K, R2 is 20K, the calculated voltage is 1.2V

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The internal reference voltage needs to be set through the VID pin

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When the VID pin is logic high, its reference voltage is 0.675V

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When the VID pin is logic low, its reference voltage is 0.75V

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At present, the VID pin is connected to a 5V power supply, so VID is a high level

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So the calculation is based on 0.675V to calculate

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The VID pin is the reference voltage setting

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Let's look at the LDO part below

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There is a VLDOIN here, which is the power supply input terminal of the LDO part

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VTTGND is the grounding

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S3 is a VTT power supply open signal, which is also the open signal of LDO

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With the power supply and open signal,

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it will output a power supply from the VTT pin

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Output voltage equal to half of the main power supply

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The output voltage needs to pass through this voltage detection pin

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to be detected whether the detected voltage is normal

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The following GND is also grounded

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VTTREF is the reference voltage output, generally not used externally

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PWM power supply is normal, it will have PG signal

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As long as there is no problem with the feedback and voltage detection pin, the PG signal will be generated

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The PG signal is an open-drain output and needs to be pulled up to a high level by an external source

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Its generation has nothing to do with the LDO

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As long as the PWM output is normal, the PG signal will be generated

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Ok, this is an introduction to the memory power supply circuit