• Learning center

144. Apple A2159 timing analysis- Generation process of PP3V3_G3H
Today we will learn about the generation process.
Detail
Comments

1

00:00:00,200 --> 00:00:02,900

Hello everyone, today we will learn about the generation process

2

00:00:02,900 --> 00:00:08,866

of the standby power supply PP3V3_G3H in the Apple A2159 circuit

3

00:00:13,000 --> 00:00:20,966

We can see from the timing diagram that PP3V3_G3H is generated by the control of TPS51980

4

00:00:21,666 --> 00:00:25,300

and mainly provides main power supply for U7800

5

00:00:29,266 --> 00:00:31,766

When the power supply chip receives this power supply,

6

00:00:32,400 --> 00:00:35,933

its crystal oscillator will start to vibrate and generate a clock,

7

00:00:36,666 --> 00:00:41,133

and then send an open signal EN to the TPS51980

8

00:00:50,900 --> 00:00:55,700

Let's look at the pin definition of TPS51980 in the circuit diagram

9

00:01:05,733 --> 00:01:08,733

Its location number is U7650

10

00:01:09,833 --> 00:01:12,666

The VIN pin of the chip is the main power supply pin,

11

00:01:12,900 --> 00:01:15,533

and its power supply comes from the common point

12

00:01:17,166 --> 00:01:18,500

we trace its source

13

00:01:20,600 --> 00:01:25,600

We found that it was renamed after the common point voltage PPBUS_G3H

14

00:01:25,600 --> 00:01:28,133

passed through the current-sensing resistor

15

00:01:42,966 --> 00:01:46,033

With the power supply, it also needs an open signal

16

00:01:46,633 --> 00:01:49,333

The 12th pin EN is the main open signal,

17

00:01:53,366 --> 00:01:58,433

we can also call it linear open, the external name is P5VXX_EN

18

00:01:58,866 --> 00:02:00,266

we trace its source

19

00:02:00,933 --> 00:02:05,733

It is renamed after PMU_PVDDMAIN_EN passed through the resistor

20

00:02:08,966 --> 00:02:14,766

Then this signal comes from the VPWR_EN pin of the U7800 power supply chip

21

00:02:20,366 --> 00:02:23,100

This is the power chip U7800

22

00:02:26,033 --> 00:02:32,500

When the TPS51980 gets the open signal, first its reference voltage starts to output

23

00:02:35,166 --> 00:02:37,666

This is a 2V reference voltage output,

24

00:02:38,633 --> 00:02:42,400

usually used to pull up this SKIP working mode setting

25

00:02:50,566 --> 00:02:56,700

After the reference voltage is normal, VREG3 and VREG5 linear power supply will be generated

26

00:03:03,733 --> 00:03:08,066

These two linear voltages are not usually adopted by external circuits

27

00:03:08,633 --> 00:03:11,000

For example, this VREG3,

28

00:03:11,733 --> 00:03:16,500

we searched its whereabouts and found that it was not used by external circuits

29

00:03:17,900 --> 00:03:21,166

The 5V linear is also not used by external circuits,

30

00:03:21,900 --> 00:03:24,066

but is used internally by the chip

31

00:03:28,400 --> 00:03:33,433

This chip is a dual PWM controller, it needs to use this 5V power supply

32

00:03:35,900 --> 00:03:40,066

Including the boost pin of the upper tube and the two VBST boost pins,

33

00:03:40,566 --> 00:03:44,766

they all need to use this 5V linear as the bootstrap base voltage

34

00:03:48,100 --> 00:03:53,400

Then, its two lower tube drivers also need to use this 5V linear as the driving source

35

00:04:01,666 --> 00:04:07,100

There are many modules and many pins that need to use this 5V linear to provide pull-up

36

00:04:08,566 --> 00:04:13,133

Let's take a look at the generation process of PP3V3_G3H

37

00:04:17,900 --> 00:04:23,533

After the previous power supply, turn on, reference and linearity are all normal,

38

00:04:25,066 --> 00:04:27,866

then it needs to get an EN2 open signal

39

00:04:30,466 --> 00:04:34,066

EN2 is dedicated to open the second PWM power supply

40

00:04:35,300 --> 00:04:40,433

The left one is the first PWM, which is used to control the generation of 5V power supply

41

00:04:42,366 --> 00:04:45,266

There are upper and lower tubes and inductors here

42

00:04:47,466 --> 00:04:52,233

The output name of the rear end of the inductor is called PP5V_G3S

43

00:04:52,600 --> 00:04:55,466

We're not going to talk about this power supply for now

44

00:04:56,500 --> 00:05:00,600

We mainly introduce the power supply of PP3V3_G3H

45

00:05:01,366 --> 00:05:06,300

This power supply is also driven by the chip output upper tube drive and lower tube drive,

46

00:05:09,900 --> 00:05:14,800

and outputs two pulses to control the external two upper and lower tubes to conduct in turn

47

00:05:14,800 --> 00:05:16,800

to generate power supply output

48

00:05:21,666 --> 00:05:25,833

The name of the inductor backend is PP3V3_G3H

49

00:05:26,666 --> 00:05:32,933

This current is relatively large, with more than ten amperes, and the working frequency is 500KHz

50

00:05:33,466 --> 00:05:37,366

This open signal is floating and not controlled by an external circuit

51

00:05:43,533 --> 00:05:49,166

In Apple's circuit, the logo begins with TP indicates a test point, which means floating

52

00:05:50,000 --> 00:05:53,433

We tracked down this switch and couldn't track down the source

53

00:05:54,733 --> 00:05:59,966

So as long as the previous master open signal is normal, the linear voltage output is normal,

54

00:06:00,333 --> 00:06:07,100

and then there will be this PWM output to control the normal output of this PP3V3_G3H

55

00:06:10,666 --> 00:06:14,200

There are two pins at the bottom, CSP and CSN,

56

00:06:15,666 --> 00:06:17,366

they are current detection pins

57

00:06:19,500 --> 00:06:21,466

RF is the frequency setting pin

58

00:06:22,666 --> 00:06:26,366

VFB2 is the feedback of 3.3V power supply

59

00:06:28,500 --> 00:06:31,400

COMP is the feedback compensation pin

60

00:06:33,933 --> 00:06:37,833

The current detection pin is connected to the front and rear ends of the inductor

61

00:06:41,100 --> 00:06:44,366

for real-time detection of the current flowing through the inductor,

62

00:06:45,366 --> 00:06:50,533

real-time detection of the energy in the inductor, and used to adjust its output

63

00:06:56,700 --> 00:07:03,266

After the voltage at the back end of the inductor is divided by resistors in series, this VFB2 is obtained,

64

00:07:04,033 --> 00:07:09,666

which is used to detect whether the output of the rear end of the inductor is overvoltage or undervoltage,

65

00:07:10,533 --> 00:07:13,133

and is used to adjust the PWM output

66

00:07:15,866 --> 00:07:20,266

When it is detected that the output voltage at the back end of the inductor is normal,

67

00:07:20,733 --> 00:07:24,766

the PGOOD2 power good signal output is finally generated

68

00:07:25,766 --> 00:07:30,433

This power good signal finally returns to the U7800 power chip,

69

00:07:31,033 --> 00:07:37,433

which is pulled up by PP3V3_G3H and sent to this pin of U7800

70

00:07:41,400 --> 00:07:46,433

This is the generation process of standby power supply PP3V3_G3H

71

00:07:47,400 --> 00:07:50,733

After this power supply is supplied to U7800,

72

00:07:51,033 --> 00:07:54,733

it mainly supplies power to its VDD_MAIN and VDD_BUCK pins

73

00:07:56,100 --> 00:07:58,666

This chip has various PWM outputs

74

00:08:02,200 --> 00:08:04,066

Let's take a look at the real picture

75

00:08:05,133 --> 00:08:10,733

This is the U7800 power chip, and there are multiple inductors around it,

76

00:08:11,266 --> 00:08:14,700

which means that there are multiple PWM power supply outputs.

77

00:08:15,400 --> 00:08:19,800

The source of each power supply is this PP3V3_G3H

78

00:08:22,700 --> 00:08:29,666

There are two inductors here, one is PP3V3_G3H and the other is PP5V_G3S

79

00:08:31,433 --> 00:08:33,966

The two next to it are the upper and lower tubes

80

00:08:34,366 --> 00:08:37,100

The back end of the inductor are filter capacitors

81

00:08:37,566 --> 00:08:42,500

These two PWMs are controlled by the chip TPS51980,

82

00:08:42,866 --> 00:08:44,666

which is on the back of the mainboard

83

00:08:46,900 --> 00:08:48,833

Let's take a look at the circuit diagram

84

00:08:50,200 --> 00:08:57,533

The power supply of VDD_MAIN and VDD_BUCK of U7800 is provided by PP3V3_G3H

85

00:09:03,300 --> 00:09:06,733

This U7800 is a multi-PWM controller,

86

00:09:08,333 --> 00:09:12,333

which integrates LDO and PWM, and switch power supply mode

87

00:09:14,666 --> 00:09:18,566

The power supply of each PWM is provided by VDD_BUCK

88

00:09:30,533 --> 00:09:35,433

Ok, this is how PP3V3_G3H is generated and where it goes

No comments yet
Come and write your comments
Links: