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    145. Apple A2159 timing analysis- CPU Standby condition
    Today we will learn about the standby conditions of the CPU in the Apple A2159 circuit.
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    1

    00:00:00,566 --> 00:00:06,666

    Hello everyone, today we will learn about the standby conditions of the CPU in the Apple A2159 circuit

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    00:00:09,166 --> 00:00:11,966

    This mainboard uses Intel's low-power CPU,

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    and its standby condition is provided by the power chip

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    00:00:18,066 --> 00:00:20,400

    Let's take a look at this timing diagram

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    When the power supply chip is powered by PP3V3_G3H_RTC,

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    00:00:28,066 --> 00:00:32,466

    it will output RTC power supply to the VCC_RTC pin of the CPU,

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    00:00:35,466 --> 00:00:38,766

    and then delay to provide it with an RTC standby clock

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    00:00:38,766 --> 00:00:44,466

    with a frequency of 32.768KHz to the RTCX1 pin of the CPU

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    00:00:50,800 --> 00:00:55,133

    The RTC power supply is provided by the LDO module inside the power chip

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    00:00:56,266 --> 00:00:58,233

    When the RTC power supply is normal,

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    the power chip will output LDO1_POK to the two reset pins of the CPU, RTCRST# and SRTCRST#

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    00:01:14,800 --> 00:01:18,033

    These are the four major conditions of the RTC circuit

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    00:01:18,433 --> 00:01:22,766

    When the power chip gets the main power supply from PP3V3_G3H,

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    00:01:23,100 --> 00:01:25,400

    its PWM circuit starts to work,

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    providing CPU with deep sleep standby power supply VCCDSW_3P3

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    00:01:30,400 --> 00:01:34,600

    and main standby power supply VCCPRIM_3P3,

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    00:01:35,966 --> 00:01:40,633

    and at the same time pulls up PCH_BATLOW_L

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    00:01:44,500 --> 00:01:48,966

    They are provided by PP3V3_S5 output by the power chip

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    Then it will provide it with 1.8V and 1.0V main standby power supply, and core power supply

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    00:01:59,666 --> 00:02:01,800

    After the standby power supply is normal,

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    00:02:02,200 --> 00:02:05,800

    the power chip will also provide standby power to the T2 chip

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    00:02:13,300 --> 00:02:21,966

    The T2 chip delays sending PM_RSMRST_L to the DSW_PWROK and RSMRST# pins of the CPU

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    00:02:30,366 --> 00:02:33,100

    Ok, this is the standby condition for the CPU

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