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Hello everyone, today we will learn about the power supply, clock,

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PG, and reset circuits in the Apple A2159 circuit

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We have talked about the boot circuit in the last video

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When the CPU receives the switch signal,

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it will send SLP_S*# and CPU_C10_GATE# to the power supply chip,

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and communicate with the T2 chip through the eSPI bus

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The T2 chip will notify the power supply chip to turn on the power supply through the I2C bus

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First, after the power supply chip receives CPU_C10_GATE#,

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it will control to generate PP1V_S3 VCCST power supply

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And output PP1V_S0SW to supply power to the VCCSTG pin of the CPU

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Then, the power chip outputs PVCCIO_EN, PVCCPLLOC_EN and PVDDQ_EN

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to turn on the main power supply PP1V2_S3 of the memory respectively

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And go with the CPU_C10_GATE# signal to generate PVCCIOS0_EN_FILT_BUF,

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to turn on PVCCIO_S0_CPU, to provide power to the CPU,

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and to turn on PP1V2_S0SW at the same time

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PP1V2_S3 is the main memory power supply for memory chips U2300, U2400, U2500 and U2600

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The PP1V2_S0 and PPVCIO_S0_CPU here mainly provide the main power supply

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for the VCCIO and VCCPLL_OC of the CPU

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After the VCCIO power supply is normal,

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a PVCCIO_PGOOD power good signal will be generated to the power chip

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The power chip will send ALL_SYS_PWRGD signal to correspond with SMC_RSMRST_L,

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generating ALL_SYS_PWRGD_R

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To correspond with another signal to generate the power supply PPVCEDRAM_S0_CPU

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This power supply provides power to the VCCOPC and VCCEOPIO pins of the CPU

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In addition, this ALL_SYS_PWRGD_R generates CPU_VCCST_PWRGD to the CPU through the synchronizer

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At the same time, it will also generate an open signal for the CPU power supply

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This CPU power supply chip is called ISL95828

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After it gets the power supply and open signal, it will control the generation of VCCSA of the CPU,

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which supplies power to the VCCSA pin of the CPU, which is the system housekeeper power supply of the CPU

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After the power supply of each channel is normal,

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the 24MHz crystal oscillator of the CPU starts to vibrate and outputs the clocks of each channel

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The CPU delays to get the PCH_PWROK and SYS_PWROK sent by the T2 chip,

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and the SYS_RESET# signal, and then delays to generate the platform reset signal

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After the CPU receives the VCCST_PWRGD signal,

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it sends a DDR_VTT_CNTL signal to the S3 pin of U8100 to control the VTT power supply of the memory

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The signal is called MEMVTT_EN after being renamed by the gate circuit

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After each power supply is normal, the CPU gets the PG signal,

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sends out various clocks, and sends out a platform reset

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Then, the CPU will send out an SVID signal to control the power supply of the CPU core

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It provides core power supply to the VCCCORE pin of the CPU

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After the CPU power supply is normal,

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it will read the program through the T2 chip and start self-test

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After testing the memory, the CPU sends the SVID signal again to the CPU power supply chip

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to control the generation of integrated display power supply VCCGT

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Ok, this is the generation process of power supply, clock, reset and PG signal