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Hello everyone, today we will learn about the hard boot process of the AMD Ryzen APU mainboard
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The first step is to install a button battery to generate 3.3V VDDBT_RTC_G
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to provide power to the RTC circuit of the APU
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When there is no button battery,
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the standby power generated by the built-in main battery can also provide power to the RTC circuit
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The second step, plug in the battery or adapter,
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and generate a common point through the protective isolation circuit
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In the third step, after the common point is normal,
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the standby power supply and the standby clock of the EC will be generated
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The EC of most models now has a built-in clock
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The EC standby power supply passes through the RC delay circuit,
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and delay to generate an EC standby reset
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After the EC's power supply, clock and reset signals are normal,
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the EC starts to read the program and configure the GPIO pins
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Some ECs have built-in programs
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In the fourth step, after the EC detects the adapter,
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it will automatically send out various open signals to control the generation of standby power supply VDD_33_S5,
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VDD_18_S5 and VDDP_S5
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Some models need to press the switch to generate these standby power supplies
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Then the EC delays to send a good standby power signal,
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which is pulled up to 1.8V externally and sent to the RSMRST_L pin of the APU
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to notify the APU that the standby voltage is normal
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Step 6, press the switch to generate a jump pulse of "high --> low --> high" and send it to EC
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The EC delays and sends a switch signal to the PWR_BTN_L pin of the APU
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After the APU receives this switch signal, it will send out SLP_S5_L and SLP_S3_L signals
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under normal standby conditions
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Step 8, SLP_S5_L is used to control the generation of memory main power supply VDDQ 1.2V,
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VDDP power supply 2.5V
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SLP_S3_L is usually used to control all the power supplies needed to generate the S0 state,
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including the VTT power supply of the memory 0.6V, the secondary voltage 3.3V, 5V, 1.8V, 0.75V, etc.
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Step 9, after each power supply is normal, the start signal of APU power supply will be generated,
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and control the generation of APU power supply VDDCR, VDDCR_SOC
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Step 10, after the APU power supply is normal, a PG signal will be generated,
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and PWR_GOOD will be generated to the APU after circuit conversion
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Step 11, after each power supply is normal, the 48M crystal oscillator of the APU starts to vibrate,
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and the APU outputs each clock
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Then step 12, the APU sends out PWROK and SVID signals to the APU power supply chip
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to adjust the APU power supply
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APU sends reset signals, including PCIE bus reset signal PCIE_RST0_L,
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and platform reset signal RESET_L
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Then the APU reads the BIOS through the SPI bus and starts self-test
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Ok, this is the hard boot process of the AMD Ryzen APU mainboard