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    175. Intel 10th~12th Light sleep standby conditions
    We will learn about the light sleep standby conditions in the standard timing of Intel's 10th to 12th generation low-power CPU chipsets.
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    1

    00:00:00,433 --> 00:00:04,133

    Hello everyone, today we will learn about the light sleep standby conditions

    2

    00:00:04,133 --> 00:00:09,100

    in the standard timing of Intel's 10th to 12th generation low-power CPU chipsets

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    00:00:13,900 --> 00:00:18,200

    The light sleep standby condition is also called the main standby condition

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    00:00:18,666 --> 00:00:21,566

    The first signal is SLP_SUS#

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    00:00:22,466 --> 00:00:28,133

    This is the deep sleep state indication signal sent by the PCH module inside the CPU,

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    00:00:28,566 --> 00:00:32,900

    which is used to control the opening and closing of the main standby voltage

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    00:00:34,100 --> 00:00:38,833

    When deep sleep is not supported, this signal will be suspended and not used

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    00:00:39,400 --> 00:00:41,300

    If deep sleep is supported,

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    00:00:41,400 --> 00:00:45,200

    it will be used to turn on or off the main standby power supply

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    00:00:48,833 --> 00:00:55,566

    The second one, V5.0A, which is not shown in the circuit diagram, so I won't explain it here

    11

    00:00:57,600 --> 00:01:06,466

    The third one, EXT_PWR_GATE#, is an external power control signal, which is generally not used

    12

    00:01:07,033 --> 00:01:12,533

    VCCPRIM_3P3 refers to the 3.3V main standby power supply

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    00:01:14,133 --> 00:01:19,333

    VCCPRIM_1P8 is the 1.8V main standby power supply of the CPU

    14

    00:01:22,400 --> 00:01:28,066

    VCCIN_AUX is to supply power to the non-core FIVR inside the CPU,

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    00:01:30,100 --> 00:01:35,900

    which is equivalent to supplying power to a common point inside the CPU, with a voltage of 1.8V

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    00:01:39,200 --> 00:01:45,100

    VCC1P05_OUT_PCH, VCC1P05_OUT_FET,

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    00:01:49,433 --> 00:01:54,766

    these two are the power supply for the internal output of the CPU, 1.05V

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    00:01:58,000 --> 00:02:06,766

    VNN_BYPASS, V1.05A_BYPASS, these two cannot be found in the circuit diagram, we will not explain here

    19

    00:02:11,200 --> 00:02:16,833

    The last one, RSMRST#, is the good signal of the main standby power supply of the CPU,

    20

    00:02:18,100 --> 00:02:22,666

    indicating that the above main standby power supplies are all normal, 3.3V,

    21

    00:02:25,233 --> 00:02:29,400

    and it is also the reset of the ACPI controller inside the PCH

    22

    00:02:32,033 --> 00:02:34,866

    OK, this is the light sleep standby condition

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