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Hello everyone, today we will learn about the boot sequence
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in the standard timing of Intel's 10th to 12th generation low-power CPU chipsets
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This lesson includes the signal explanation of the boot sequence and the introduction of the boot process
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First, let's look at the signal explanation of the boot sequence
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The first signal, PWRBTN#, which is the falling edge trigger signal received by the CPU
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It is high in standby mode, it will be pulled low after pressing the switch,
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and it will return to high after releasing the switch
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The second one, SLP_A#,
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this signal was used to turn on the power supply of the ME module
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But now there is no ME power supply, so this signal is not used
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The third one, CL_RST#,
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it is used to reset the wireless network card when supporting the Intel AMT function
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PLATFORM VCCASW, this is the ME module power supply,
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the module has been canceled, it can not be found in the circuit diagram
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Next, SLP_LAN# and SLP_WLAN# are the power supply start signals of wired network card and wireless network card
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VCC_LANPHY is the power supply of the network card,
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VCC_WLANPHY is the power supply of the wireless network card
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SLP_S5# means that the CPU exits the shutdown state after receiving the switch signal
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SLP_S4# is usually used to turn on memory power supply
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SLP_S3# is usually used to turn on the power supply required for the S0 state
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SLP_S0#
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When the CPU is in the idle state, this signal will control the CPU power supply to enter the low power mode
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This signal can also be connected to the EC for other power management
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The last one, CPU_C10_GATE#,
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this signal is usually used to control the opening and closing of VCCST and VCCSTG power supply
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When the CPU enters the C10 state, which is the idle state,
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this signal will turn off VCCST and VCCSTG
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In normal operation, this signal is high, it will turn on VCCST and VCCSTG
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Now, let's take a look at the boot process
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First, the CPU must meet the 11 major standby conditions
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After the standby conditions are normal, the CPU needs to read the ME program in the BIOS and configure the pins
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Then, the EC standby condition must be satisfied
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Including EC standby power supply, EC standby clock, EC standby reset and EC standby program, etc.
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And the switch pin and LID signal should be high level
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Then, press the switch
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After the EC receives the switch signal,
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it delays and sends a "high --> low --> high" switch signal to the PWRBTN# pin of the CPU
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The CPU will set SLP_S5#, SLP_S4#, SLP_S3# to high
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in order to turn on the power supplies of the following channels
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At the same time, CPU_C10_GATE# will be issued to control the opening of VCCST power supply
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Ok, this is the boot process
