1

00:00:00,400 --> 00:00:08,800

Hello everyone, in this lesson we will continue to look at the timing of the A card

2

00:00:09,533 --> 00:00:12,233

In the last lesson, we saw the generation of bus power supply.

3

00:00:12,633 --> 00:00:17,300

Next, let's look at the generation of core power supply VDDCR_GFX and VDDCR_SOC

4

00:00:17,933 --> 00:00:23,133

We opened the catalog to find their power supply chip, on page 16

5

00:00:25,000 --> 00:00:27,900

You can see that this is their power supply chip

6

00:00:29,000 --> 00:00:37,333

This power supply chip has a lot of pins, and its power supply chip is made by IR series Infineon

7

00:00:37,666 --> 00:00:40,400

This means that the chip is programmed

8

00:00:41,400 --> 00:00:49,166

But the most basic external conditions required by this chip are power supply and open signal

9

00:00:49,800 --> 00:00:53,266

When the chip has power supply and open signal,

10

00:00:53,466 --> 00:01:00,933

it will control the DRMOS work through these PWM pins to generate the corresponding power supply

11

00:01:02,300 --> 00:01:05,966

Next, let's take a look at its power supply and open signal

12

00:01:07,000 --> 00:01:11,166

Its power supply VCC is connected to +3.3V_BUS

13

00:01:11,466 --> 00:01:16,100

This is the 3.3V power supply of the golden finger, which has been generated now

14

00:01:16,100 --> 00:01:18,933

Let's draw this step

15

00:01:23,566 --> 00:01:26,666

Next we come to the open signal

16

00:01:26,933 --> 00:01:29,466

Its turn-on signal is at pin 21

17

00:01:30,700 --> 00:01:37,700

The external name of this enable signal is VDDGFX_VDDC_EN

18

00:01:38,000 --> 00:01:40,966

Let's find out where this signal went

19

00:01:43,866 --> 00:01:48,600

It can be seen that this signal is generated by this part of the circuit

20

00:01:49,600 --> 00:01:55,300

To generate a high-level core power supply start signal, then Q1026 must be cut off

21

00:01:57,733 --> 00:02:01,533

It is an NPN transistor with low level cut-off

22

00:02:01,766 --> 00:02:08,566

Then its B level must be low, and Q1024 must be turned on.

23

00:02:09,400 --> 00:02:14,333

Q1024 is an N-channel MOS tube, high level conduction

24

00:02:14,466 --> 00:02:19,100

It connects the PG signal of +0.75V

25

00:02:19,566 --> 00:02:23,666

And this PG signal has been generated in the last power supply

26

00:02:24,066 --> 00:02:28,266

Then the turn-on signal of the core power supply is also generated

27

00:02:29,100 --> 00:02:31,433

Let's draw this step for him too

28

00:02:36,900 --> 00:02:41,900

With the power supply and open signal, the chip will work, send a PWM signal to the DRMOS,

29

00:02:42,500 --> 00:02:47,266

and control these DRMOS to generate two core power supplies

30

00:02:49,700 --> 00:02:55,733

At the same time, it can be seen that the power supply pin of this DRMOS is powered by 5V

31

00:02:55,933 --> 00:02:59,200

At this time, we have not found a 5V generating circuit

32

00:02:59,700 --> 00:03:02,933

Let's search to see how 5V is generated

33

00:03:04,900 --> 00:03:07,400

You can see that 5V is generated from here

34

00:03:07,766 --> 00:03:10,133

This is also a PWM circuit

35

00:03:11,266 --> 00:03:14,466

The workflow of this chip is also relatively simple

36

00:03:14,866 --> 00:03:22,500

First, a VIN power supply pin is required, and then a 5V linear

37

00:03:23,200 --> 00:03:30,566

After getting another turn-on signal, the chip can start to work, and can output 5V power supply

38

00:03:32,100 --> 00:03:38,133

This power supply will also return to the FB pin for voltage regulation feedback

39

00:03:39,266 --> 00:03:43,566

When the voltage is stable, it will send out a PG signal

40

00:03:44,700 --> 00:03:49,866

Therefore, the external conditions required by this chip are still power supply and opening,

41

00:03:50,233 --> 00:03:52,533

that is, VIN and EN

42

00:03:54,266 --> 00:03:56,100

Let's look at VIN first

43

00:03:59,200 --> 00:04:01,533

VIN is connected to the golden finger

44

00:04:01,733 --> 00:04:03,900

12V power supply is already available

45

00:04:04,233 --> 00:04:05,866

Let's draw this step for him

46

00:04:09,666 --> 00:04:13,566

After the power supply is available, let's look for the enable signal EN

47

00:04:13,866 --> 00:04:16,933

It can be seen that it is not connected to anything externally,

48

00:04:17,133 --> 00:04:22,300

and it is directly pulled up by the 12V gold finger through the pull-up resistor

49

00:04:24,166 --> 00:04:26,866

So the EN signal is also there

50

00:04:32,133 --> 00:04:40,100

With the 5V power supply, the DRMOS powered by the core will also have power supply,

51

00:04:41,033 --> 00:04:45,966

then two core power supplies can be generated.

52

00:04:50,066 --> 00:04:54,533

At this point, the core power supply is generated