1
00:00:00,466 --> 00:00:05,966
In this lesson, let's take a look at the maintenance of the mainboard that causes the file memory failure
2
00:00:06,466 --> 00:00:12,033
When there is a problem with the memory-related circuit of the mainboard, it may cause the file memory to fail.
3
00:00:12,466 --> 00:00:16,933
The fault phenomenon of the file memory is that the code stops after only running a few times
4
00:00:17,266 --> 00:00:23,533
After a file memory failure occurs, we need to overhaul the working conditions of the memory.
5
00:00:23,966 --> 00:00:27,666
Let's first look at the memory working conditions of DDR3 memory
6
00:00:28,266 --> 00:00:31,800
The first is the memory main power supply VDDQ
7
00:00:32,500 --> 00:00:36,400
The main power supply of DDR3 memory is generally 1.5V
8
00:00:36,500 --> 00:00:40,000
This 1.5V we need to measure at the inductor
9
00:00:40,566 --> 00:00:42,300
Next is VTT
10
00:00:42,866 --> 00:00:46,900
The voltage of VTT is generally half of the memory main power supply
11
00:00:47,500 --> 00:00:52,533
The main memory power supply is 1.5V, so VTT is 0.75V
12
00:00:53,066 --> 00:01:00,333
VTT power supply can be measured at pin 120 and pin 240 of the memory
13
00:01:01,133 --> 00:01:06,766
So where are the 120 pins and 240 pins of the memory slot?
14
00:01:07,633 --> 00:01:13,300
We must first know the division of memory slot pins
15
00:01:14,700 --> 00:01:21,000
The memory slot of DDR3 is divided into a short section and a long section by the anti-fooling port.
16
00:01:21,333 --> 00:01:25,266
The short side is the head, the long side is the tail
17
00:01:26,466 --> 00:01:29,866
The pin division of the memory slot is like this
18
00:01:30,366 --> 00:01:34,200
Here is the first pin, counting down from top to bottom
19
00:01:34,266 --> 00:01:37,700
The last one in this row is 120 pins
20
00:01:38,100 --> 00:01:41,066
The first one in the second row is 121 pins
21
00:01:41,066 --> 00:01:45,100
Then count down the last pin is 240 pins
22
00:01:45,533 --> 00:01:51,900
So the 120 and 240 pins of VTT are at the bottom of both sides
23
00:01:52,700 --> 00:01:55,333
Then down, the reference voltage
24
00:01:55,766 --> 00:01:58,933
Its voltage is generally equal to the VTT voltage
25
00:01:59,400 --> 00:02:05,800
The reference voltage is generally generated after the main power supply of the memory is divided in series.
26
00:02:06,666 --> 00:02:12,533
There are two reference voltages for DDR3, one is pin 1 of the memory, and the other is pin 67 of the memory
27
00:02:12,733 --> 00:02:15,800
The first pin of the memory is very easy to find,
28
00:02:16,066 --> 00:02:19,700
but the 67th pin of the memory is not so easy to find
29
00:02:20,166 --> 00:02:24,166
In actual maintenance, we generally only measure the reference voltage of pin 1,
30
00:02:24,766 --> 00:02:27,166
and the measurement of pin 67 is relatively small.
31
00:02:27,866 --> 00:02:30,000
Further down, SPD power supply
32
00:02:30,166 --> 00:02:34,700
SPD power supply is the SPD chip power supply of the memory
33
00:02:35,333 --> 00:02:40,366
When the mainboard self-tests the memory, it needs to read the information of the memory SPD chip first.
34
00:02:42,666 --> 00:02:45,200
If there is no SPD power supply for the memory,
35
00:02:45,266 --> 00:02:50,100
then it will not be able to read the information of the memory, and it will not be able to self-test the memory.
36
00:02:50,500 --> 00:02:54,700
The SPD is generally on the 236th pin of the memory slot,
37
00:02:55,000 --> 00:03:01,166
which is the fifth pin from the bottom to the right of the memory slot.
38
00:03:01,866 --> 00:03:04,733
This is the SPD power supply of the memory
39
00:03:05,633 --> 00:03:07,700
Next is the SM bus
40
00:03:08,133 --> 00:03:12,100
It is a bus used by the bridge to read memory SPD chips
41
00:03:14,300 --> 00:03:18,566
When this bus reads the memory SPD, there should be data transmission,
42
00:03:18,833 --> 00:03:20,933
that is, there is a waveform
43
00:03:21,266 --> 00:03:25,700
If we don't have an oscilloscope, we can also measure the voltage of the SM bus
44
00:03:25,933 --> 00:03:28,733
In general, the SM bus is 3.3V
45
00:03:30,466 --> 00:03:36,166
It is also very easy to find on pins 118 and 238 of the memory slot
46
00:03:37,300 --> 00:03:39,933
The last one is memory reset
47
00:03:40,166 --> 00:03:43,866
Its voltage is 1.5V and is pulled up by VDDQ
48
00:03:45,866 --> 00:03:53,933
Of course, memory reset is not always a high level of 1.5V under normal circumstances.
49
00:03:54,600 --> 00:03:59,333
But if you don't have an oscilloscope, you can use a multimeter to measure the memory reset
50
00:03:59,733 --> 00:04:04,800
As long as there is 1.5V on it
51
00:04:05,766 --> 00:04:08,733
If we have tested all the above conditions, they are all normal, but the memory is still blocked.
52
00:04:09,366 --> 00:04:15,966
Then we have to measure whether the other data lines of the memory slot are connected to the CPU.
53
00:04:16,666 --> 00:04:21,200
The measurement method is to install the CPU and use the memory slot value card to value each data line
54
00:04:21,266 --> 00:04:25,366
Or you can refer to the drawing
55
00:04:26,000 --> 00:04:29,466
Make sure that each data line is not broken
56
00:04:29,966 --> 00:04:33,366
Of course, the premise is that the replacement method has been used to confirm that
57
00:04:33,700 --> 00:04:36,133
the fault of the file memory is caused by the mainboard,
58
00:04:37,266 --> 00:04:40,266
and the mainboard has no external faults.
59
00:04:41,766 --> 00:04:45,033
These are the maintenance methods of DDR3 memory